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CAN and FlexRay for Vehicle Communications

This work presents a literary review, during which the functionality of Controller Area Network (CAN) systems was studied, the future implementation of new FlexRay systems, and various tools to design and implement a working model for interworking these systems

What is CAN?
Controller Area Network (CAN) is a serial communications protocol for transmitting short control messages in a real-time embedded system. For larger messages, several higher-level transport protocols have been proposed and standardized for a wide range of applications. These protocols generally assign the same fixed priority to all frames in a given message.

CAN is designed to transmit short real-time control messages over a small distance. Such networks are currently used in a wide variety of applications including agricultural, automotive, heavy equipment, marine and industrial automation. They are used to connect control nodes on a broadcast bus at speeds of up to1 Mbps. Data is encoded in a message and each message is transmitted in one or more frames. Each frame generally carries up to 8 bytes (octets) of application data. Messages can be transmitted either periodically or sporadically.

Generally, each message is statically assigned a unique identifier (either 11- bit or 29- bit). The identifier is used to assign a priority to each frame in the message and for filtering by CAN hardware upon receipt. Like Ethernet, CAN is a Carrier Sense Multiple Access protocol. However, unlike Ethernet, there are no destructive collisions, that is, among frames currently ready for transmission; the frame with the highest priority is guaranteed to obtain access to the bus. This is achieved through a .bit-wise. arbitration protocol. If several controllers are transmitting at the same time, and one controller transmits a .0. bit, then all controllers monitoring the bus will see a .0. bit on the bus. In CAN, a .0. bit is referred to as a dominant bit, and a .1. bit is referred to as a recessive bit. When a controller transmits a .1. bit that is overwritten by a .0. bit, it stops transmitting its current frame because it has lost contention for the bus. Since CAN requires identifiers to be unique, and arbitration is performed across the entire identifier, the highest priority frame is guaranteed to gain access to the bus. Once a frame gains access to the bus, it is transmitted without interruption; that is, non-pre-emptively. CAN frames with smaller value identifiers have higher priority.

Each station in the CAN network, having received the message correctly, performs an acceptance test to determine whether the data received is relevant for that station. If the data is of significance for the station concerned the data is processed, otherwise it is ignored. A high degree of system configuration and flexibility is achieved as a result of the content-oriented addressing scheme. It is very easy to add stations to the existing CAN network without making any hardware or software modifications to the existing stations, provided that the new stations are purely receivers. Because the data transmission protocol does not require physical destination addresses for the individual components, it supports the concept of modular electronics and also permits multiple reception (broadcast, multicast) and the synchronization of distributed processes: measurements needed as information by several controllers can be transmitted via the network, in such a way that it is unnecessary for each controller to have its own sensor.

Simple CAN Bus System
Simple CAN Bus System


CAN Bus Bit-wise Arbitration
CAN Bus Bit-wise Arbitration

What is FlexRay?
Flexray is a scalable static and dynamic message transmission (deterministic and flexible) protocol, which has a high net data rate of 5 Mbit/sec; gross data rate approximately 10Mbit/sec. It is scalable fault-tolerance (single and dual channel). It has error containment on the physical layer through an independent Bus Guardian. And has a fault tolerant clock synchronisation (global time base).

Basic features include:
Synchronous and asynchronous data transmission (scalable)
High net data rate of 5 Mbit/sec; gross data rate approximately 10Mbit/sec Deterministic data transmission, guaranteed message latency and message jitter
Support of redundant transmission channels
Fault tolerant and time triggered services implemented in hardware
Fast error detection and signalling
Support of a fault tolerant synchronised global time base
Error containment on the physical layer through an independent Bus Guardian
Arbitration free transmission
Support of optical and electrical physical layer
Support for bus, star and multiple star topologies

In order to attain its high transmission speeds Flexray uses an Active Star configuration. The active star consists of a node containing multiple bus drivers linked by a high speed back plane, the active star, as its name suggests is a powered device, it has 3 key states indicated by levels. The lowest level is where the unit is powered and active, level 2 is when the device is in a .standby. mode where it is powered but the buses are inactive, and the device can be recovered into level 1 by sending a wake signal on any of its input buses. Level 3 is the power off state or sleep. The internal power is off and the buses are inactive

FlexRay System
FlexRay System

From the description of the active star in the FlexRay requirements specification this device has neither an internal microcontroller nor a communications controller, however by the requirement of the three power states it can be induced that a form of controller must be central to the device. FlexRay can be used in a bus topology, however the related speed is in the same region as the existing CAN protocol. Key differences between CAN and FlexRay in the bus state are FlexRay.s wake on bus command feature common to both controllers and to active stars, and the ability to have a redundant bus, this feature offers increased fault tolerance.

The Digilab 2E (D2E) FPGA-based development board makes an excellent prototyping platform for moderate to complex digital circuits and systems. The D2E board features a 200K-gate Xilinx Spartan 2E XC2S200E FPGA in a PQ208 package that provides 143 user I/Os. All available I/O signals are routed either to the expansion connectors, or to the ports and other on-board devices. A single on-board pushbutton and LED allow for quick circuit and device programming checks, as well as basic I/O (e.g., for reset and status). The D2E board mates with several existing peripheral boards so that entire digital systems can be quickly and easily constructed. The D2E board works seamlessly with the free WebPack CAD tools, and it ships with a programming cable and power supply, so projects can be implemented immediately, without the need for any other components or expenses.

Xilinx Spartan II Devopment Kit
Xilinx Spartan II Devopment Kit
Fouad Sethna (MEng)
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